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11-215 11 transceivers product description ordering information typical applications features functional block diagram rf micro devices, inc. 7628 thorndike road greensboro, nc 27409, usa tel (336) 664 1233 fax (336) 664 0454 http://www.rfmd.com optimum technology matching? applied si bjt gaas mesfet gaas hbt si bi-cmos sige hbt si cmos 25 resntr+ 26 vco out 29 data out 31 lvladj 32 rx enabl 8 mix in 6 lna out 4 rx in 2 tx out 1 tx enabl 24 resntr- 23 mod in 22 data ref 21 demod in 19 if2 bp- 18 if2 bp+ 17 if2 in pa lna control logic gain control linear rssi 27 gnd4 28 vcc1 30 vcc3 3 gnd2 5 gnd1 7 gnd3 9 gnd5 10 mix out+ 11 vbg 12 rssi 13 if1 in 14 if1 bp+ 15 if1 bp- 16 if1 out 20 gnd6 RF2945 433/868/915mhz fsk/ask/ook transceiver ? wireless meter reading keyless entry systems 433, 868 and 915mhz ism band systems wireless data transceiver wireless security systems battery-powered portable devices the RF2945 is a monolithic integrated circuit intended for use as a low cost fm transceiver. the device is provided in 32-lead plastic lqfp packaging and is designed to be used with a pll ic to provide a fully functional fm trans- ceiver. the chip is intended for digital (ask, fsk, ook) applications in the north american 915mhz ism band and european 433/868mhz ism bands. the integrated vco has a buffered output to feed the rf signal back to the pll ic to form the frequency synthesizer. internal decoding of the rx enabl and tx enabl lines allow for half duplex operation as well as turning on the vco to give the synthesizer time to settle and complete power downmode. the data ref line allows the use of an external capacitor to control the dc level at the adaptive data slicer input for setting the bit decision threshold. fully monolithic integrated transceiver 2.4v to 5.0v supply voltage narrowband and wideband fsk 300mhz to 1000mhz frequency range 10db cascaded noise figure 10mw output power with power control RF2945 433/868/915mhz fsk/ask/ook transceiver RF2945 pcba-l fully assembled evaluation board (433mhz) RF2945 pcba-m fully assembled evaluation board (868mhz) RF2945 pcba-h fully assembled evaluation board (915mhz) 11 rev a10 000919 7 max 0 min + 0.15 0.10 0.60 0.127 7.00 +0.20sq. 5.00 +0.10sq. 0.22 +0.05 dimensions in mm. 0.15 0.05 -a- 1.40 +0.05 0.50 package style: lqfp-32_5x5
11-216 RF2945 rev a10 000919 11 transceivers absolute maximum ratings parameter ratings unit supply voltage -0.5 to +5.5 v dc control voltages -0.5 to +5.0 v dc input rf level +10 dbm output load vswr 50:1 operating ambient temperature -40 to +85 c storage temperature -40 to +150 c parameter specification unit condition min. typ. max. overall t=25 c, v cc =3.6v, freq=915mhz rf frequency range 300 to 1000 mhz vco and pll section vco frequency range 300 to 1000 mhz vco out impedance 50 ? vco out level -20 dbm freq=915mhz vco/pll phase noise -72 dbc/hz 10khz offset, 5khz loop bw -98 dbc/hz 100khz offset, 5khz loop bw transmit section max modulation frequency 2 mhz min modulation frequency set by loop filter bandwidth maximum power level +7 +8.5 dbm freq=433mhz 1 +3 5 dbm freq=915mhz power control range 12 db power control sensitivity 10 db/v max fm deviation 200 khz instantaneous frequency deviation is inversely proportional with the modulation voltage. dependent on external circuitry. antenna port impedance 50 ? tx enabl=?1?, rx enabl=?0? antenna port vswr 1.5:1 tx mode modulation input impedance 4 k ? harmonics -38 dbc freq=915mhz, with eval board filter spurious dbc compliant to part 15.249 and i-ets 300 220 overall receive section frequency range 300 to 1000 mhz cascaded voltage gain 35 db freq=433mhz 23 db freq=915mhz cascaded noise figure 10 db cascaded input ip 3 -31 dbm freq=433mhz -26 dbm freq=915mhz rx sensitivity -91.5 -96 dbm if bw=400khz, freq=915mhz, s/n=8db lo leakage -55 dbm freq=915mhz rssi dc output range 0.5 to 2.5 v r load =51k ? rssi sensitivity 22.5 mv/db rssi dynamic range 70 80 db caution! esd sensitive device. rf micro devices believes the furnished information is correct and accurate at the time of this printing. however, rf micro devices reserves the right to make changes to its products without notice. rf micro devices does not assume responsibility for the use of the described product(s).
11-217 RF2945 rev a10 000919 11 transceivers parameter specification unit condition min. typ. max. lna voltage gain 23 db 433mhz 16 db 915mhz noise figure 4.8 db 433mhz 5.5 db 915mhz input ip 3 -27 dbm 433mhz -20 dbm 915mhz input p 1db -37 dbm 433mhz -30 dbm 915mhz antenna port impedance 50 ? rx enabl=?1?, tx enabl=?0? antenna port vswr 1.5:1 rx mode output impedance open collector ? 433mhz and 915mhz mixer single-ended configuration conversion voltage gain 8 db 433mhz 7 db 915mhz noise figure (ssb) 10 db 433mhz 17 db 915mhz input ip 3 -21 dbm 433mhz -17 dbm 915mhz input p 1db -31 dbm 433mhz -28 dbm 915mhz first if section if frequency range 0.1 10.7 25 mhz voltage gain 34 db if=10.7mhz, z l =330 ? noise figure 13 db if1 input impedance 330 ? if1 output impedance 330 ? second if section if frequency range 0.1 10.7 25 mhz voltage gain 60 db if=10.7mhz if2 input impedance 330 ? if2 output impedance 1 k ? at if2 out pin demod input impedance 10 k ? data output bandwidth 1.4 mhz 3db bandwidth, z load =1m ? || 3pf data output level 0.3 v cc -0.3 v z load =1m ? || 3 pf. output voltage is pro- portional with the instantaneous frequency deviation.
11-218 RF2945 rev a10 000919 11 transceivers parameter specification unit condition min. typ. max. power down control logical controls ?on? 2.0 v voltage supplied to the input logical controls ?off? 1.0 v voltage supplied to the input control input impedance 25k ? turn on time 1 ms turn on/off times are dependent upon turn off time 1 ms pll loop parameters rx to tx and tx to rx time 100 s power supply voltage 3.6 v specifications 2.7 5.0 v operating limits temperature range -40c to +85c 2.4 v operating limits temperature range +10c to +40c current consumption 17 22 27.4 ma tx enabl, lvladj=3.6v, rx enabl=0v 4.8 6.1 7.2 ma tx enabl=3.6v, lvladj, rx enabl=0v 4.4 6.1 6.8 ma tx enabl=0v, rx enabl=3.6v 1 a tx enabl, lvladj, rx enabl=0v 3.6 ma pll only mode, tx enabl, rx enabl=3.6v, lvladj=0v
11-219 RF2945 rev a10 000919 11 transceivers pin function description interface schematic 1 tx enabl enables the transmitter circuits. tx enabl>2.0v powers up all trans- mitter functions. tx enabl<1.0v turns off all transmitter functions except the pll functions. 2txout rf output pin for the transmitter electronics. tx out output impedance is a low impedance when the transmitter is enabled. tx out is a high impedance when the transmitter is disabled. 3gnd2 ground connection for the 40 db if limiting amplifier and tx pa func- tions. keep traces physically short and connect immediately to ground plane for best performance. 4rxin rf input pin for the receiver electronics. rx in input impedance is a low impedance when the transmitter is enabled. rx in is a high imped- ance when the receiver is disabled. 5gnd1 ground connection for rf receiver functions. keep traces physically short and connect immediately to ground plane for best performance. 6lnaout output pin for the receiver rf low noise amplifier. this pin is an open collector output and requires an external pull up coil to provide bias and tune the lna output. a capacitor in series with this output can be used to match the lna to 50 ? impedance image filters. 7gnd3 same as pin 3. 8 mix in rf input to the rf mixer. an lc matching network between lna out and mix in can be used to connect the lna output to the rf mixer input in applications where an image filter is not needed or desired. 9gnd5 gnd5 is the ground connection shared by the input stage of the trans- mit power amplifier and the receiver rf mixer. 10 mix out if output from the rf mixer. interfaces directly to 10.7mhz ceramic if filters as shown in the application schematic. a pull-up inductor and series matching capacitor should be used to present a 330 ? termina- tion impedance to the ceramic filter. alternately, an if tank can be used to tailor the if frequency and bandwidth to meet the needs of a given application. 11 vref if dc voltage reference for the if limiting amplifiers. a 10nf capacitor from this pin to ground is required. . 12 rssi a dc voltage proportional to the received signal strength is output from this pin. the output voltage range is 0.5v to 2.3v and increases with increasing signal strength. 13 if1 in if input to the 40db limiting amplifier strip. a 10nf dc blocking capaci- tor is required on this input. 40 k ? 20 k ? tx enabl tx out 20 v cc rx in 500 lna out v cc gnd5 mix in mix out 15 pf 15 pf gnd5 gnd5 v cc rssi if1 in 330 330 60 k ? 60 k ? if1 bp+ if1 bp-
11-220 RF2945 rev a10 000919 11 transceivers pin function description interface schematic 14 if1 bp+ dc feedback node for the 40db limiting amplifier strip. a 10nf bypass capacitor from this pin to ground is required. see pin 13. 15 if1 bp- same as pin 14. see pin 13. 16 if1 out if output from the 40db limiting amplifier. the if1 out output presents a nominal 330 ? output resistance and interfaces directly to 10.7mhz ceramic filters. 17 if2 in if input to the 60db limiting amplifier strip. a 10nf dc blocking capaci- tor is required on this input. the if2 in input presents a nominal 330 ? input resistance and interfaces directly to 10.7mhz ceramic filters. 18 if2 bp+ dc feedback node for the 60db limiting amplifier strip. a 10nf bypass capacitor from this pin to ground is required. see pin 17. 19 if2 bp- same as pin 18. see pin 17. 20 gnd6 ground connection for 60db if limiting amplifier. keep traces physically short and connect immediately to ground plane for best performance. 21 demod in this pin is the input to the fm demodulator. this pin is not ac cou- pled. therefore, a dc blocking capacitor is required on this pin to avoid shorting the demodulator input with the lc tank. a ceramic discrimina- tor or dc blocked lc tank resonant at the if should be connected to this pin. 22 data ref this pin is used for setting the adaptive data slicer dc reference level. a capacitor from this pin to ground can be used to set the reference level at the average dc level of the data bit stream.the dc level deter- mines the bit decision threshold. 23 mod in fm analog or digital modulation can be imparted to the vco through this pin. the vco varies in accordance to the voltage level presented to this pin. to set the deviation to a desired level, a voltage divider refer- enced to vcc is the recommended. this deviation is also dependent upon the overall capacitance of the external resonant circuit. see pin 24. 24 resntr+ this port is used to supply dc voltage to the vco as well as to tune the center frequency of the vco. equal value inductors should be con- nected to this pin and pin 25 although a small imbalance can be used to tune in the proper frequency range. 25 resntr- see resntr+ description. see pin 24. 26 vco out this pin is used is supply a buffered vco output to go to the pll chip. this pin has a dc bias and needs to be ac coupled. 27 gnd4 gnd4 is the ground shared on chip by the vco, prescaler, and pll electronics. if1 out if2 in 330 330 60 k ? 60 k ? if2 bp+ if2 bp- demod in 10 k ? v cc 50k ? data ref resntr- resntr+ 4k ? mod in vco out
11-221 RF2945 rev a10 000919 11 transceivers * lvl adj pin must be low to disable transmitter. pin function description interface schematic 28 vcc1 this pin is used to supply dc bias to the lna, mixer, 1st if amp and bandgap reference. a rf bypass capacitor should be connected directly to this pin and returned to ground. a 22pf capacitor is recom- mended for 915mhz applications. a 68 pf capacitor is recommended for 433mhz applications. 29 data out demodulated data output from the demodulator. output levels on this are ttl/cmos compatible. the magnitude of the load impedance is intended to be 1m ? or greater. 30 vcc3 this pin is used to supply dc bias and collector current to the transmit- ter pa. it also supplies voltage to the 2 nd if amplifier, demod and data slicer. a rf bypass capacitor should be connected directly to this pin and returned to ground. a 22pf capacitor is recommended for 915mhz applications. a 68pf capacitor is recommended for 433mhz applica- tions. 31 lvl adj this pin is used to vary the transmitter output power. an output level adjustment range greater than 12db is provided through analog volt- age control of this pin. dc current of the transmitter power amp ia also reduced with output power. note: this pin must be low when the transmitter is disabled. 32 rx enabl enable pin for the receiver circuits. rx enabl>2.0v powers up all receiver functions. rx enabl<1.0v turns off all receiver functions except the pll functions and the rf mixer. operation mode tx enabl rx enabl function sleep mode low low entire chip is powered down. total current consumption is <1 a. * transmit mode high low transmitter, vco are on. receive mode low high receiver, vco are on. * pll lock high high vco is on. this mode allows time for a synthesizer loop to lock without spending current on the transmitter or receiver. data out 400 4k ? lvl adj 40 k ? 50 k ? rx enabl
11-222 RF2945 rev a10 000919 11 transceivers RF2945 theory of operation and application information the RF2945 is part of a family of low-power rf trans- ceiver ic?s that was developed for wireless data com- munication devices operating in the european 433mhz to 868mhz ism band, and 915mhz u.s. ism band. this ic has been implemented in a 15ghz silicon bipolar process technology that allows low-power transceiver operation in a variety of commercial wire- less products. in its basic form, the RF2945 can be implemented as a two-way half-duplex fsk transceiver with the addition of some crystals, filters, and passive components. the RF2945 is designed to interface with common pll ic?s to form a multi-channel radio. the receiver if section is optimized to interface with low-cost 10.7mhz ceramic filters and has a 3db bandwidth of 25mhz and can still be used (with lower gain) at higher frequencies with other types of filters. the pa output and lna input are available on separate pins and are designed to be con- nected together through a dc blocking capacitor. in the transmit mode, the pa will have a 50 ? impedance and the lna will have a high impedance. in the receive mode, the lna will have a 50 ? impedance and the pa will have a high impedance. this eliminates the need for a tx/rx switch, and allows for a single rf filter to be used in transmit and receive modes. separate access to the pa and lna allows the RF2945 to inter- face with external components such as a high power pa, lower nf lna, upconverters, and downconverters, for a variety of implementations. fm/fsk systems the mod in pin drives an internal varactor for modu- latingthevco.thispincanbedrivenwithavoltage level needed to generate the desired deviation. this voltage can be carried on a dc bias to select desired slope (deviation/volt) for fm systems. or, a resistor divider network referenced to vcc or ground can divide down logic level signals to the appropriate level for a desired deviation in fsk systems. on the receiver demod, the data out pin is the out- put of an internal data slicer providing logic level out- puts. the digital output is generated by a data slicer that compares the demodulator with a dc reference voltage recovered from the demodulator. the refer- ence voltage is obtained by a filter capacitor on pin 22. an on-chip 1.6mhz rc filter is provided at the demod- ulator output to filter the undesirable 2xif product. this type data slicer has the ability to track out minor fre- quency errors in the system, but requires a longer period of time for the preamble for optimum results. for best operation of the on-chip data slicer, fm deviation needs to be larger than 40khz p-p . the data slicer itself is a transconductance amplifier, and the data out pin is capable of driving rail-to-rail output only into a very high impedance and a small capacitance. the amount of capacitance will determine the bandwidth of data out. in a 3pf load, the band- width is in excess of 500khz. the rail-to-rail output of the data slicer is also limited by the frequency deviation and bandwidth of if filters. with the 400khz bandwidth filters on the evaluation boards, the rail-to-rail output is limited to less than 320khz. choosing the right if bandwidth and deviation versus data rate (mod index) is important in evaluating the applicability of the RF2945 for a given data rate. the primary consideration when directly modulating the vco is the data rate versus pll bandwidth. the pll will track out the modulation to the extent of its bandwidth, which distorts the modulating data. there- fore, the lower frequency components of the modulat- ing data should be five to 10 times the loop bandwidth to minimize the distortion. the lower frequency compo- nents are generated by long strings of 1?s and 0?s in data stream. by limiting the number of consecutive, same bits, lower frequency components can be set. in addition, the data stream should be balanced to mini- mize distortion. using a coding pattern such as manchester is highly recommended to optimize system performance. the pll loop bandwidth is important in several system parameters. for example, switching from transmit to receive requires the vco to retune to another fre- quency. the switching speed is proportional to the loop bandwidth: the higher the loop bandwidth, the faster the switching times. phase noise of the vco is another factor. phase noise outside the bandwidth is because of the vco itself, rather than a crystal reference. the design trade-offs must be made here in selecting a pll loop bandwidth with acceptable phase noise and switching characteristics, as well as minimal distortion of the modulation data. ask/ook systems the transmitter of the RF2945 has an output power level adjust (lvl adj) that can be used to provide approximately 18db of power control for amplitude modulation. the rssi output of the receiver section can be used to recover the modulation. the rssi out- put is from a current source, and needs to have a resis-
11-223 RF2945 rev a10 000919 11 transceivers tor to convert to a voltage. a 51k ? resistor load typically produces an output of 0.7v to 2.5v. a parallel capacitor is suggested to band limit the signal. for ask applications, the 18db range of the lvl adj does not produce enough voltage swing in the rssi for reliable communications. the on/off keying (ook) is suggested to provide reliable communications. to achieve this, the lvl adj and tx enabl need to be controlled together (please note that lvl adj cannot be left high when tx enabl is low). this will provide an on/off ratio of greater than 50db. one of the unfor- tunate consequences of modulating in this manner is vco pulling by the pa. this results in a spurious out- put outside the desired transmit band, as the pll momentarily loses lock and reacquires. this may be avoided by pulse-shaping tx data to slow the change inthevcoloadtoapacewhichthepllcantrackwith its given loop bandwidth. the loop bandwidth may also be increased to allow it to track faster changes brought about by load pulling. for the ask/ook receiver demodulator, an external data slicer is required. the rssi output is used to pro- vide both the filter data and a very low pass filter (rela- tive to the data rate) dc reference to the data slicer. because the very low pass filter has a slow time con- stant, a longer preamble may be required to allow for the dc reference to acquire a stable state. here, as in the case of the fsk transmitter, the data pattern also affects the dc reference and the reliability of the receive data. again, a coding scheme such as manchester should be used to improve data integrity. application and layout considerations both the rx in and the tx out have a dc bias on them. therefore, a dc blocking cap is required. if the rf filter has dc blocking characteristics (such as a ceramic dielectric filter), then only one dc blocking cap would be needed to separate the dc of the rx and tx. these are rf signals and care should be taken to run the signal keeping them physically short. because of the 50 ? /high impedance nature of these two signals, they may be connected together into a single 50 ? device (such as a filter). an external lna or pa may be used, if desired, but an external rx/tx switch may be required. the vco is a very sensitive block in the system. rf signals feeding back into the vco (either radiated or coupled by traces) may cause the pll to become unlocked. the trace(s) for the anode of the tuning var- actor should also be kept short. the layout of the reso- nator and varactor are very important. the capacitor and varactor should be close to the RF2945 pins, and the trace length should be as short as possible. the inductors may be placed further away, and reducing the value of the inductors can compensate any trace inductance. printed inductors may also be used with careful design. for best results, physical layout should be as symmetrical as possible. figure 1 is a recom- mended layout pattern for the vco components. when using the loop bandwidth lower than 5khz shown on the evaluation board, better filtering of the vcc at the resonators (and lower vcc noise, as well) will help reduce phase noise of the vco. a series resistor of 100 ? to 200 ? ,anda1 f or larger capacitor may be used. for the interface between the lna/mixer, the coupling capacitor should be as close to the RF2945 pins as possible, with the bias inductors further away. once again, the value of the inductor may be changed to compensate for trace inductance. the output imped- ance of the lna is in the order of several k ? ,which makes matching to 50 ? very difficult. if image filtering is desired, a high impedance filter is recommended. the quad tank of the discriminator may be imple- mented with ceramic discriminator available from a couple of sources. this design works well for wideband applications where temperature range is limited. the temperature coefficient of ceramic discriminators may be in the order of +50ppm/c. the alternative to the ceramic discriminator is the lc tank, which provides a broadband discriminator more useful for high data rates. not to scale representative of size 24 23 loop voltage vcc 25 26 figure 1. recommended vco layout
11-224 RF2945 rev a10 000919 11 transceivers pll synthesizer the RF2945 evaluation board uses an lmx2316 pll ic from national semiconductor. this pll ic may be programmed from the software available from national semiconductor (codeloader at www.national.com/ appinfo/wireless/). an external reference oscillator is required for the pll ic allowing for the evaluation of different reference frequencies or step sizes. the national semiconductor software also has a calculator for determining the r and c component values for a given loop bandwidth. the RF2945 is controlled by rx enabl and tx enabl which are decoded to put the RF2945 into one of four states. it may be put into a pll-only mode with tx enabl and rx enabl both high. this condition is used to provide time for the synthesizer to turn on and obtain lock before turning on the receiver or transmit- ter. note that lvl adj needs to be held low for pll- onlymode.sometimes,itisdesirabletorampupthe power amplifier to minimize load pulling on the vco. to do this with the RF2945, first put the RF2945 into pll mode by putting tx enabl and rx enabl high. then,rampuplvladjtoturnonthetransmitterand pa. the rate at which lvl adj is allowed to ramp up is dependent on the pll loop bandwidth. vcc pushing also affects the vco frequency. a good low pass filter on vcc will minimize the vcc pushing effects. for applications requiring fast switching speeds or turn-on times, and low data rate loop filter bandwidths, the lmx2316 may be configured to drive the loop filter in a fast switching mode. please refer to literature on the lmx2316 for more information.
11-225 RF2945 rev a10 000919 11 transceivers pin out 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 32 29 30 31 28 27 26 25 912 11 10 13 14 15 16 resntr+ mod in data ref demod in gnd6 if2 bp- if2 bp+ if2 in resntr- vco out gnd4 vcc1 data out vcc3 lvl adj rx enabl if1 out if1 bp- if1 bp+ if1 in rssi vref if mix out gnd5 mix in gnd3 lna out gnd1 rx in gnd2 tx out tx enabl
11-226 RF2945 rev a10 000919 11 transceivers application schematic - 915 mhz 25 26 29 31 32 8 6 4 2 1 24 23 22 21 19 18 17 pa lna control logic gain control linear rssi 27 28 30 3 5 7 9 10 11 12 13 14 15 16 20 rx enabl tx enabl mod in 100 pf 100 pf 915 mhz saw 10 nh 10 pf 22 pf 10 nf 10 ? v cc filter 10 nf 10 nf filter 11 pf 8.2 uh 22 pf 10 nf 10 ? v cc 10 pf 51 k ? rssi 10 nf 10 nf fm disc. tbd 1.5 k ? 10 nf d1 smv1233- 011 2 pf 8.2 nh 8.2 nh 22 pf 10 nf 100 ? v cc 10 k ? 33 pf pll ic 100 ? 4.7 nf 30 k ? 330 pf 10 k ? tbd 22 pf 22 pf 10 nf 10 nf 10 ? v cc 10 ? v cc lvl adj data out
11-227 RF2945 rev a10 000919 11 transceivers application schematic - 915 mhz if=25mhz, bw=2mhz 25 26 29 31 32 8 6 4 2 1 24 23 22 21 19 18 17 pa lna control logic gain control linear rssi 27 28 30 3 5 7 9 10 11 12 13 14 15 16 20 tx enabl c6 22 pf c7 22 pf l4 10 nh c21 10 pf c22 22 pf c23 0.1 uf r7 10 ? c13 10 nf c12 10 nf c57 100 pf l5 680 nh c25 22 pf c26 0.1 uf r9 10 ? c10 10 nf c11 10 pf r3 51 k ? rss i c14 10 nf c15 10 nf c19 2.2 nf c31 39 pf 50 ? strip r80 0 ? c30* 4pf c8 4pf l1 8.2 nh c9 4pf j2 rf r6* n/c l11 680 nh c55 39 pf c24 5pf c5 4.7 uf + c27 39 pf vcc c54 10 pf c53 47 pf l10 680 nh c56 3pf c59 47 pf l9 680 nh c52 10 pf c51* 4-22 pf l8 680 nh c20 10 nf j4 mod in 50 ? strip l3 8.2 nh c16 2pf d1 smv1233-011 l2 8.2 nh c17 22 pf c18 0.1 uf c81 4.7 uf r4 100 ? vcc2 r14 10 k ? c48 4.7 nf r13 30 k ? r12* 100 ? c47 330 pf l7* tbd c50 22 pf r60 0 ? c41 100 pf 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 vp flo vcc2 cpo fo/ld gnd le gnd data finb clock fin ce vcc1 gnd oscin c43 0.1 uf c44 22 pf vpll c34 1nf vpll r24 27 k ? r27 12 k ? c32 22 pf c33 0.1 uf r11 10 ? vpll r25 27 k ? r28 12 k ? r26 27 k ? r29 12 k ? r30 51 ? 50 ? strip j5 ref osc rx enabl lvl adj data out c4 22 pf c3 0.1 uf r2 10 ? r1 10 ? c1 22 pf c2 0.1 uf c82 4.7 uf + c29 4.7 uf + vpll/vcc2 1 2 p1 con2 p1-1 vcc1 gnd p4 1 2 con2 p4-1 rssi gnd n/c gnd p2-1 lvl adj p2 1 2 3 con3 p3 1 2 3 con3 p3-1 tx enabl gnd p3-1 rx enabl p7 1 2 3 con3 p7-1 vcc2 p7-3 vpll gnd p8 1 2 con2 gnd p8-1 rx out p6 db9 4 9 5 7 6 1 8 3 2 lmx2316
11-228 RF2945 rev a10 000919 11 transceivers evaluation board schematic - 915mhz (download bill of materials from www.rfmd.com.) c21 10 pf l5 6.8 uh c6 22 pf c7 22 pf c24 11 pf c26 0.1 uf r7 10 ? rx enabl p3-3 tx enabl p3-2 f1 sfe10.7ma21 r3 51 k ? c11 10 pf rssi f2 sfe10.7ma21 u4 cdf 107b- a0-001 10.7 mhz c15 10 nf c47 6.8nf r87* 0 ? c50 22 pf c17 22 pf l3 8.2 nh l2 8.2 nh c16 2pf c18 0.1 uf r4 100 ? d1 smv1233 -011 c1 22 pf r1 10 ? p2-1 lvl adj pll loop bw ~5 khz r60 0 ? l7* tbd c58* 10 nf r12 100 ? j5 ref osc r27 12 k ? r28 12 k ? r29 12 k ? r24 27 k ? r25 27 k ? r26 27 k ? p4-1 p4 rssi gnd 1 2 p3-3 p3 1 2 3 4 5 tx enabl gnd rx enabl p3-2 nc nc p3-5 p3-4 v pll (lmx2315) v cc (RF2945) p1-1 p1-3 p1 gnd 1 2 3 p2-1 p2-3 p2 gnd 1 2 3 lvl adj nc c81 4.7 uf c30* 5pf c8 5pf l1 8.2 nh c9 5pf j2 rf c10 10nf c12 10nf c13 10nf j1 rx out j4 mod in c27* 10 nf j3 mix out * denotes components that are normally depopulated. 16 17 23 2 10 8 linear rssi 31 lna 6 4 1 32 26 24 25 13 19 18 11 15 14 22 21 29 pa control logic 12 3 5 7 9 20 30 28 27 gain control c19 2.2 nf 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 fld cpd gnd gnd fnb fin vcc1 oscin vp vcc2 fd/ld le data clk ce gnd c33 0.1 uf c32 22 pf vpll r13 1.2k ? c41 100 pf c44 22 pf c43 .01 uf c34 1nf r30 51 ? lmx2316 c49 tbd l6* 2.2 uh c28* 120 pf r84 0 ? r83 0 ? c55* 100 pf r8 8.2 k ? c25 22 pf r9 10 ? vcc1 c57* 100 pf c56* 330 pf l11* 680 nh r82* 560 ? c54* 100 pf c53* 330 pf l10* 680 nh r86 0 ? r85 0 ? c52* 100 pf r81* 560 ? bw=400 khz 10.7 mhz vpll p6 db9 4 9 5 7 6 1 2 3 8 r88 0 ? l8 4.7 uh c51* capvar c31 39 pf r5* 4.3 k ? c20 10 nf 2945400b v cc 50 ? strip v cc c2 0.1 uf c3 0.1 uf c4 22 pf r2 10 ? c23 0.1 f l4 12 nh r6* n/c v cc c22 22 pf r80 0 ? c14 10 nf c42 0.1 uf r14 10 k ?
11-229 RF2945 rev a10 000919 11 transceivers evaluation board schematic - 433mhz l 4 4 7 n h c21 33 pf l5 6.8 uh c6 100 pf c7 100 pf c24 12 pf c26 0.1 uf r7 10 ? rx enabl p3-3 tx enabl p3-2 f1 sfe10.7ma21 c12 10 nf c13 10 nf r3 51 k ? c11 10 pf rssi f2 sfe10.7ma21 u4 cdf 107b- a0-001 10.7 mhz c15 10 nf c14 10 nf c47 2.2 nf c50 100 pf c3 0.1 f r2 10 ? v c c c18 0.1 uf r4 100 ? d1 smv1235 -011 c2 0.1 f r1 10 ? v c c p2-1 lvl adj pllloopbw ~5khz r60 0 ? l7* tbd c42 33 nf r12* 100 ? j5 ref osc r27 12 k ? r28 12 k ? r29 12 k ? r24 27 k ? r25 27 k ? r26 27 k ? p4-1 p4 rssi gnd 1 2 p3-3 p3 1 2 3 4 5 tx enabl gnd rx enabl p3-2 nc nc p3-5 p3-4 v pll (lmx2315) v cc (RF2945) p1-1 p1-3 p1 gnd 1 2 3 p2-1 p2-3 p2 gnd 1 2 3 lvl adj nc c81 4.7 uf c1 22 pf c4 22 pf c30 8pf c8 15 pf l1 22 nh c9 8pf j2 rf r6* n/c c10 10nf j1 rx out c27* 10 nf j3 mix out * denotes components that are normally depopulated. 16 17 23 2 10 8 linear rssi lna 6 4 1 32 26 24 25 13 19 18 11 15 14 22 21 29 pa control logic 12 3 5 7 9 20 30 28 27 gain control c19 2.2 nf 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 fld cpd gnd gnd fnb fin vcc1 oscin vp vcc2 fd/ld le data clk ce gnd c33 0.1 uf c32 22 pf vpll r13 4.7 k ? c41 100pf c44 22 pf c43 .01 uf r30 51 ? c34 1nf lmx2316 r14 20 k ? c49 220 pf l6* 2.2 uh c28* 120 pf r84 0 ? r83 0 ? c55* 100 pf r8 8.2 k ? c25 100 pf r9 10 ? vcc1 c57* 100 pf c56* 330 pf l11* 680 nh r82* 560 ? c54* 100 pf c53* 330 pf l10* 680 nh r86 0 ? r85 0 ? c52* 100 pf r81* 560 ? bw=400 khz 10.7 mhz vpll p6 db9 4 9 5 7 6 1 2 3 8 l8 4.7 uh c51* 3-10 pf c31 39 pf r5* 4.3 k ? c20 10 nf v c c 2945401- v c c c23 0.1 f c22 100 pf l9 22 nh r87* 0 ? c17 100 pf l3 12 nh l2 12 nh c16 10 pf c58* 10 nf j4 mod in r88 0 ? 31
11-230 RF2945 rev a10 000919 11 transceivers evaluation board schematic - 868mhz c21 9pf l5 8.2 uh c6 47 pf c7 47 pf c24 12 pf c26 0.1 uf r7 10 ? rx enabl p3-3 tx enabl p3-2 c10 10 nf f1 sfe10.7ma21 c12 10 nf c13 10 nf r3 51 k ? c11 10 pf rssi f2 sfe10.7ma21 u4 cdf 107b- a0-001 10.7 mhz c15 10 nf c47 330 pf r87* 0 ? c17 47 pf l3 8.2 nh l2 8.2 nh c16 3pf c18 0.1 uf r4 100 ? d1 smv1233 -011 c1 47 pf r1 10 ? p2-1 lvl adj pll loop bw ~5 khz r60 0 ? l7* tbd c58* 10 nf r12 100 ? j5 ref osc r27 12 k ? r28 12 k ? r29 12 k ? r24 27 k ? r25 27 k ? r26 27 k ? p4-1 p4 rssi gnd 1 2 p3-3 p3 1 2 3 4 5 tx enabl gnd rx enabl p3-2 nc nc p3-5 p3-4 v pll (lmx2315) v cc (RF2945) p1-1 p1-3 p1 gnd 1 2 3 p2-1 p2-3 p2 gnd 1 2 3 lvl adj nc c81 4.7 uf c30* 5pf c8 5pf l1 8.2 nh c9 5pf j2 rf j1 rx out j4 mod in c27* 10 nf j3 mix out * denotes components that are normally depopulated. 16 17 23 2 10 8 linear rssi 31 lna 6 4 1 32 26 24 25 13 19 18 11 15 14 22 21 29 pa control logic 12 3 5 7 9 20 30 28 27 gain control c19 2.2 nf c33 0.1 uf c32 47 pf r13 30 k ? c41 47 pf c44 47 pf c43 .01 uf c34 1nf r30 51 ? c49* tbd l6* 2.2 uh c28* 120 pf r84 0 ? r83 0 ? c55* 100 pf r8 8.2 k ? c25 47 pf r9 10 ? vcc1 c57* 100 pf c56* 330 pf l11* 680 nh r82* 560 ? c54* 100 pf c53* 330 pf l10* 680 nh r86 0 ? r85 0 ? c52* 100 pf r81* 560 ? bw=400 khz 10.7 mhz vpll p6 db9 4 9 5 7 6 1 2 3 8 r88 0 ? l8 4.7 uh c51* capvar c31 39 pf r5* 4.3 k ? c20 10 nf 2945402- v cc 50 ? strip v cc c2 0.1 uf c3 0.1 uf c4 47 pf r2 10 ? c23 0.1 f l4 12 nh r6* n/c v cc c22 47 pf r80 0 ? c14 10 nf c48 4.7 nf r14 10 k ? 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 fl 0 cp 0 gnd gnd finb fin vcc1 oscin vp vcc2 f 0 /ld le data clk ce gnd lmx2316 c50 47 pf r11 10 ? v pll
11-231 RF2945 rev a10 000919 11 transceivers evaluation board layout - 915mhz board size 3.050? x 3.050? board thickness 0.031?, board material fr-4
11-232 RF2945 rev a10 000919 11 transceivers
11-233 RF2945 rev a10 000919 11 transceivers evaluation board layout - 433mhz
11-234 RF2945 rev a10 000919 11 transceivers
11-235 RF2945 rev a10 000919 11 transceivers evaluation board layout - 868mhz
11-236 RF2945 rev a10 000919 11 transceivers
11-237 RF2945 rev a10 000919 11 transceivers rssi output versus temperature v cc = 2.4 v, 915 mhz 0.0 0.5 1.0 1.5 2.0 2.5 -130.0 -110.0 -90.0 -70.0 -50.0 -30.0 -10.0 10.0 received signal strength (dbm) rssi output (v) -40c 10c 25c 40c 85c p out versus level control and v cc 915 mhz and temperature = 25c -30.0 -20.0 -10.0 0.0 10.0 0.0 1.0 2.0 3.0 4.0 5.0 level control (v) p out (dbm) vcc=2.4v vcc=2.7v vcc=3.0v vcc=3.3v vcc=3.6v vcc=3.9v vcc=4.2v vcc=4.5v vcc=4.8v tx power output and icc versus level adjust at 433mhz, 3.6v v cc -15.0 -10.0 -5.0 0.0 5.0 10.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 lvl adj (v) rf p 0 (dbm) 5.0 10.0 15.0 20.0 25.0 30.0 icc (ma) pout(433) icc(433) tx power output and icc versus level adjust at 868mhz, 3.6v v cc -20.0 -15.0 -10.0 -5.0 0.0 5.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 lvl adj (v) rf p 0 (dbm) 5.0 10.0 15.0 20.0 25.0 30.0 icc (ma) pout(868) icc(868) tx power output and icc versus level adjust at 905mhz, 3.6v v cc -20.0 -15.0 -10.0 -5.0 0.0 5.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 lvl adj (v) rf p 0 (dbm) 5.0 10.0 15.0 20.0 25.0 30.0 icc (ma) pout(905) icc(905) receive current versus v cc (excluding pll ic) 4.0 5.0 6.0 7.0 8.0 9.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply voltage (v) icc (ma) icc (433) icc (868) icc (905)
11-238 RF2945 rev a10 000919 11 transceivers

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